mb/google/volteer: Mark PCIe root ports with attached eMMC as built-in

Set PcieRpSlotImplemented to 0 on the PCIe root ports which have eMMC
attached via a GL9763E bridge/controller for chronicler and elemi
variants. This ensures that FSP correctly treats these RPs as built-in
rather than slot devices.

TEST=tested with rest of patch train

Change-Id: I0e06df689164f95ee9f0253fde3df2891239fa63
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90981
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>

src/mainboard/google/volteer/variants/chronicler/overridetree.cb

@@ -272,6 +272,7 @@ chip soc/intel/tigerlake
 			register "PcieRpHotPlug[4]" = "1"
 			register "PcieClkSrcUsage[5]" = "4"
 			register "PcieClkSrcClkReq[5]" = "5"
+			register "PcieRpSlotImplemented[4]" = "false"
 		end
 		device ref pmc hidden
 			# The pmc_mux chip driver is a placeholder for the

src/mainboard/google/volteer/variants/elemi/overridetree.cb

@@ -273,6 +273,7 @@ chip soc/intel/tigerlake
 			register "PcieRpHotPlug[4]" = "1"
 			register "PcieClkSrcUsage[5]" = "4"
 			register "PcieClkSrcClkReq[5]" = "5"
+			register "PcieRpSlotImplemented[4]" = "false"
 		end
 		device ref pmc hidden
 			# The pmc_mux chip driver is a placeholder for the