From 0f9940bf89dc211e0f5b1baca00631a9385c6c87 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 28 Jan 2026 18:19:46 -0600 Subject: [PATCH] mb/google/volteer: Mark PCIe root ports with attached eMMC as built-in Set PcieRpSlotImplemented to 0 on the PCIe root ports which have eMMC attached via a GL9763E bridge/controller for chronicler and elemi variants. This ensures that FSP correctly treats these RPs as built-in rather than slot devices. TEST=tested with rest of patch train Change-Id: I0e06df689164f95ee9f0253fde3df2891239fa63 Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/c/coreboot/+/90981 Tested-by: build bot (Jenkins) Reviewed-by: Sean Rhodes --- src/mainboard/google/volteer/variants/chronicler/overridetree.cb | 1 + src/mainboard/google/volteer/variants/elemi/overridetree.cb | 1 + 2 files changed, 2 insertions(+) diff --git a/src/mainboard/google/volteer/variants/chronicler/overridetree.cb b/src/mainboard/google/volteer/variants/chronicler/overridetree.cb index 180acca7b3..483fd3df21 100644 --- a/src/mainboard/google/volteer/variants/chronicler/overridetree.cb +++ b/src/mainboard/google/volteer/variants/chronicler/overridetree.cb @@ -272,6 +272,7 @@ chip soc/intel/tigerlake register "PcieRpHotPlug[4]" = "1" register "PcieClkSrcUsage[5]" = "4" register "PcieClkSrcClkReq[5]" = "5" + register "PcieRpSlotImplemented[4]" = "false" end device ref pmc hidden # The pmc_mux chip driver is a placeholder for the diff --git a/src/mainboard/google/volteer/variants/elemi/overridetree.cb b/src/mainboard/google/volteer/variants/elemi/overridetree.cb index 8f220b8fcd..c63dd738f2 100644 --- a/src/mainboard/google/volteer/variants/elemi/overridetree.cb +++ b/src/mainboard/google/volteer/variants/elemi/overridetree.cb @@ -273,6 +273,7 @@ chip soc/intel/tigerlake register "PcieRpHotPlug[4]" = "1" register "PcieClkSrcUsage[5]" = "4" register "PcieClkSrcClkReq[5]" = "5" + register "PcieRpSlotImplemented[4]" = "false" end device ref pmc hidden # The pmc_mux chip driver is a placeholder for the