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soc/mediatek/mt8195: Fix SCP register address

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The parentheses are missing in the mtk_scp macro definition.

The only usage is

 SET32_BITFIELDS(&mtk_scp->scp_clk_on_ctrl,
                 SCP_CLK_ON_CTRL, 1);

I guess that bit is already set by default, so there's no ULPOSC clock
issue found so far.

BUG=none
TEST=none
BRANCH=cherry

Change-Id: I2dbb5c465ee60f0c4dce8ff77b8d3a39db42e4f5
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85436
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
This commit is contained in:
Yu-Ping Wu 2024-12-02 16:12:17 +08:00 • committed by Yu-Ping Wu
commit 0a7c3ed514
1 changed files with 1 additions and 1 deletions
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2
src/soc/mediatek/mt8195/include/soc/pmif.h
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@ -134,7 +134,7 @@ struct mtk_scp_regs {
check_member(mtk_scp_regs, scp_clk_on_ctrl, 0x6C);
#define mtk_scp ((struct mtk_scp_regs *)SCP_CFG_BASE + 0x21000)
#define mtk_scp ((struct mtk_scp_regs *)(SCP_CFG_BASE + 0x21000))
enum {
PMIF_TARGET_FREQ_MHZ = 248,