coreboot/payloads
Julius Werner d270c0ec18 arm: Fix minor mistake in cache maintenance assembly
Turns out that when you clear 28 bits starting with bit 3, you leave bit
31 standing. Ooops...

This shouldn't really matter since that bit is reserved/SBZ in CLIDR
anyway, but it's still nice to fix it. This whole thing should really be
an AND for clarity anyway in my opinion.

Bug found in upstream NetBSD (who would've thought...).

BUG=None
TEST=Still boots.

Change-Id: Ic826e82d58fd1ce984971afea3dfa9296f746d9f
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/193300
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Gabe Black <gabeblack@chromium.org>
2014-04-05 01:42:16 +00:00
..
bayou GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
coreinfo GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
external bump SeaBIOS to 1.7.2.1 2013-03-04 11:00:17 +01:00
libpayload arm: Fix minor mistake in cache maintenance assembly 2014-04-05 01:42:16 +00:00
nvramcui GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
tianocoreboot ARM: Generalize armv7 as arm. 2013-10-02 09:18:44 +00:00
ubootcli payload/ubootcli: add the u-boot cli 2014-01-09 13:58:47 +00:00