coreboot/mainboard/amd/dbm690t/dts
Myles Watson 33e15e4148 This is a small HT fixup until HT links get figured out better.
It removes processors from the list of devices on the domain's bus so
that pci_scan_bus won't disable them, then scans for them, then puts
them back.  There are lots of other ways to do this, but this one
seemed minimally invasive and ends up with a correct tree.

The dts fixups I should have put in with the other K8 patch for the
new resource allocator.  I went to the v2 Config.lb files and tried to
get them as complete as possible.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@1109 f3766cd6-281f-0410-b1cd-43a5c92072e9
2009-01-08 16:22:39 +00:00

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/*
* This file is part of the coreboot project.
*
* Copyright (C) 2008 Ronald G. Minnich <rminnich@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/*
-[0000:00]-+-00.0
+-01.0-[0000:01]----05.0
+-06.0-[0000:02-03]--
+-07.0-[0000:04]----00.0
+-12.0
+-13.0
+-13.1
+-13.2
+-13.3
+-13.4
+-13.5
+-14.0
+-14.1
+-14.2
+-14.3
+-14.4-[0000:05]--
+-18.0
+-18.1
+-18.2
\-18.3
00:00.0 Host bridge: ATI Technologies Inc RS690 Host Bridge
00:01.0 PCI bridge: ATI Technologies Inc RS690 PCI to PCI Bridge (Internal gfx)
00:06.0 PCI bridge: ATI Technologies Inc RS690 PCI to PCI Bridge (PCI Express Port 2)
00:07.0 PCI bridge: ATI Technologies Inc RS690 PCI to PCI Bridge (PCI Express Port 3)
00:12.0 SATA controller: ATI Technologies Inc SB600 Non-Raid-5 SATA
00:13.0 USB Controller: ATI Technologies Inc SB600 USB (OHCI0)
00:13.1 USB Controller: ATI Technologies Inc SB600 USB (OHCI1)
00:13.2 USB Controller: ATI Technologies Inc SB600 USB (OHCI2)
00:13.3 USB Controller: ATI Technologies Inc SB600 USB (OHCI3)
00:13.4 USB Controller: ATI Technologies Inc SB600 USB (OHCI4)
00:13.5 USB Controller: ATI Technologies Inc SB600 USB Controller (EHCI)
00:14.0 SMBus: ATI Technologies Inc SBx00 SMBus Controller (rev 14)
00:14.1 IDE interface: ATI Technologies Inc SB600 IDE
00:14.2 Audio device: ATI Technologies Inc SBx00 Azalia
00:14.3 ISA bridge: ATI Technologies Inc SB600 PCI to LPC Bridge
00:14.4 PCI bridge: ATI Technologies Inc SBx00 PCI to PCI Bridge
00:18.0 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration
00:18.1 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map
00:18.2 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller
00:18.3 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control
01:05.0 VGA compatible controller: ATI Technologies Inc RS690M [Radeon X1200 Series]
04:00.0 Ethernet controller: Broadcom Corporation NetLink BCM5789 Gigabit Ethernet PCI Express (rev 11)
*/
/{
device_operations="dbm690t";
mainboard_vendor = "AMD";
mainboard_name = "dbm690t";
cpus { };
apic@0 {
};
domain@0 {
/config/("northbridge/amd/k8/domain");
/* Make sure that the HT device is first; if it isn't found,
* the rest of the devices won't be found.
*/
pci@0 {
/config/("southbridge/amd/rs690/ht.dts");
};
pci@1{
/config/("southbridge/amd/sb600/pci.dts");
pci@5{
/config/("southbridge/amd/rs690/gfx.dts");
};
};
pci@6{ /* Port 2 */
/config/("southbridge/amd/rs690/pcie.dts");
};
pci@7{ /* Port 3 */
/config/("southbridge/amd/rs690/pcie.dts");
};
pci@12{
/config/("southbridge/amd/sb600/hda.dts");
};
pci@13,0{
/config/("southbridge/amd/sb600/usb.dts");
};
pci@13,1{
/config/("southbridge/amd/sb600/usb.dts");
};
pci@13,2{
/config/("southbridge/amd/sb600/usb.dts");
};
pci@13,3{
/config/("southbridge/amd/sb600/usb.dts");
};
pci@13,4{
/config/("southbridge/amd/sb600/usb.dts");
};
pci@13,5{
/config/("southbridge/amd/sb600/usb2.dts");
};
pci@14,0{
/config/("southbridge/amd/sb600/sm.dts");
};
pci@14,1{
/config/("southbridge/amd/sb600/ide.dts");
};
pci@14,2{
/config/("southbridge/amd/sb600/ac97audio.dts");
};
pci@14,3{
/config/("southbridge/amd/sb600/lpc.dts");
ioport@2e {
/config/("superio/ite/it8712f/dts");
com1enable = "1";
};
};
pci@14,4{
/config/("southbridge/amd/sb600/pci.dts");
};
pci@18,0 {
/config/("northbridge/amd/k8/pci");
};
pci@18,1 {};
pci@18,2 {};
pci@18,3 {};
};
};