coreboot/src/soc/intel
Naveen Krishna Chatradhi f82758a876 Glados: Update Serial IO modes in devicetree
This patch updates the Serial IO modes for UART2 to PCI mode
in devicetree for glados board.

Also we switch over to CONSOLE_SERIAL8250MEM_32 here. 8-bit
legacy UART will stop working after devicetree change.

BRANCH=None
BUG=chrome-os-partner:40857
TEST=Built for glados and tested LPSS logs on glados.

CQ-DEPEND=CL:284881 CL:284882 CL:284883

Change-Id: I433979c852c80848c006ef089b43d75a17e761c5
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 2c37519e0762801cbb9b547b538b385c84299189
Original-Change-Id: I2faec08d089e407c5ab9838bea980553f49821c4
Original-Signed-off-by: Naveen Krishna Chatradhi <naveenkrishna.ch@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/284826
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Wenkai Du <wenkai.du@intel.com>
Original-Tested-by: Wenkai Du <wenkai.du@intel.com>
Reviewed-on: http://review.coreboot.org/11002
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-07-21 20:23:25 +02:00
..
baytrail x86: Drop -Wa,--divide 2015-07-07 18:30:55 +02:00
braswell intel fsp: remove CHIPSET_RESERVED_MEM_BYTES 2015-07-21 20:09:31 +02:00
broadwell azalia: fix up and clean up shrinkage of boilerplate code 2015-07-14 13:40:07 +02:00
common intel/common: remove printk in pre_console_init() 2015-07-21 20:14:37 +02:00
fsp_baytrail soc/intel: Remove microcode terminators 2015-07-17 23:05:17 +02:00
skylake Glados: Update Serial IO modes in devicetree 2015-07-21 20:23:25 +02:00