coreboot/src/soc
Felix Held b9fe66e0ab include/device/pci_ids: add model number to PCIe port and bus devices
Different models within family 17h have different PCI IDs for their PCIe
GPP port and internal bus devices.

Change-Id: I386df908ce5451b4484be2a2e4a9018c3d47d030
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47677
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2020-11-18 17:54:10 +00:00
..
amd include/device/pci_ids: add model number to PCIe port and bus devices 2020-11-18 17:54:10 +00:00
cavium soc/cavium: Drop unneeded empty lines 2020-09-22 17:14:49 +00:00
example x86: Add a minimal example SoC along with a board 2020-10-30 21:34:18 +00:00
intel soc/intel/common: Move CSE RW into new FMAP region to optimize boot time 2020-11-18 01:26:44 +00:00
mediatek mb/google/asurada: Implement enable_regulator and regulator_is_enabled 2020-11-18 06:13:26 +00:00
nvidia soc/nvidia/tegra124/include/soc/clk_rst.h: Remove extra tab 2020-11-09 10:31:32 +00:00
qualcomm src: Add missing 'include <console/console.h>' 2020-11-17 09:50:24 +00:00
rockchip src: Change bare 'unsigned' to 'unsigned int' 2020-11-16 11:03:16 +00:00
samsung src/soc/samsung: Move common headers to "common/include/soc" 2020-10-19 07:11:32 +00:00
sifive include/console/uart: make index parameter unsigned 2020-09-12 14:59:33 +00:00
ti include/console/uart: make index parameter unsigned 2020-09-12 14:59:33 +00:00
ucb