coreboot/src
Felix Singer f7b8cb542e mb/clevo/cml-u: Add comment to board selection
Change-Id: I531865416b1bf9c5a73c809590059e7d7c8f373a
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47715
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-19 13:22:38 +00:00
..
acpi acpigen: Add more useful helper functions 2020-11-09 07:30:01 +00:00
arch ACPI S3: Do some minor cleanup 2020-11-18 13:36:37 +00:00
commonlib commonlib: Add timestamp values for forced delays 2020-11-16 11:01:37 +00:00
console console: Override uart base address 2020-11-09 07:46:10 +00:00
cpu Revert "arch|cpu/x86: Add Kconfig option for x86 reset vector" 2020-11-17 07:46:34 +00:00
device device/pci: Add NULL check for PCI driver's .ops 2020-11-16 12:15:38 +00:00
drivers src: Add missing 'include <console/console.h>' 2020-11-17 09:01:14 +00:00
ec ec/google/chromeec: Add more wrappers for regulator control 2020-11-18 06:13:12 +00:00
include include/device/pci_ids: add model number to AMD GBE controller 2020-11-18 17:54:22 +00:00
lib src: Add missing 'include <console/console.h>' 2020-11-17 09:01:14 +00:00
mainboard mb/clevo/cml-u: Add comment to board selection 2020-11-19 13:22:38 +00:00
northbridge nb/intel/sandybridge: Clarify some parts of raminit 2020-11-16 12:07:20 +00:00
security vboot: stop implementing VbExDisplayScreen 2020-11-18 05:49:46 +00:00
soc include/device/pci_ids: add model number to PCIe port and bus devices 2020-11-18 17:54:10 +00:00
southbridge soc/amd/common: remove SOC_AMD_COMMON_BLOCK Kconfig symbol 2020-11-18 16:08:17 +00:00
superio superio/smsc/sio1036: Support 16-bit IO port addressing 2020-11-18 13:12:11 +00:00
vendorcode vc/intel/fsp/fsp2_0/cooperlake_sp: Fix WW45 FSP Memory map HOB mismatch 2020-11-16 11:03:00 +00:00
Kconfig soc/intel/xeon_sp: Move function debug macros 2020-10-29 16:44:19 +00:00