1044f03878
On recent AMD platforms the VRT bit in the StatusD register is read-writeable and set every 1024msec when RTC power is good. This leads to a timeout in RtcWaitToUpdate() waiting for the bit to be set and the gEfiRealTimeClockArchProtocolGuid won't be installed. The protocol is critical to boot. Adjust the code to not clear the VRT bit, as RtcWaitToUpdate() will return an error, as it assumes the VRT bit is read-only and hardwired to one as on Intel ICHs. While the timeout could be increased it would also increase boot time by up to a second. On platforms where the VRT bit is read-only the introduced code does the same as before. Change-Id: I8bc432114c83fa5f5fb35a144e3a35c38ee8a3de Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87415 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> |
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| coreinfo | ||
| external | ||
| libpayload | ||
| linuxcheck | ||
| nvramcui | ||
| Kconfig | ||
| Makefile.mk | ||