Ronald G. Minnich e6af929661 PIT: memory setup ... Tested and working. Gets us to ramstage. Change-Id: Ib9ea4a6c912e8152246aaf4f1f084a4aa1626053 Signed-off-by: Ronald G. Minnich <rminnich@google.com> Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3677 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>		2013-07-10 21:50:33 +02:00
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amd	AMD S3 resume: Add framwork to write bigger data	2013-06-29 18:57:42 +02:00
armltd	ARMv7: De-uboot-ify Exynos5250 code	2013-07-10 20:08:15 +02:00
dmp	Add initial support for DMP Vortex86EX CPU.	2013-06-20 19:14:44 +02:00
intel	ec: Add romstage function for checking and rebooting EC	2013-07-10 21:44:22 +02:00
qemu-x86	qemu: add q35 support	2013-06-17 17:04:17 +02:00
samsung	PIT: memory setup	2013-07-10 21:50:33 +02:00
ti	am335x: Implement support for the UART.	2013-07-06 00:46:18 +02:00
via	VIA Nano: Add microcode updates files	2013-06-04 18:02:11 +02:00
x86	Do CAR variable migration only once	2013-06-22 20:47:21 +02:00
Kconfig	Add initial support for DMP Vortex86EX CPU.	2013-06-20 19:14:44 +02:00
Makefile.inc	cpu: Add CPU microcode file to cbfs with 16-byte alignment	2013-07-10 21:45:28 +02:00