coreboot/include/arch/x86
Ronald G. Minnich 62f8ea8e9b This set of changes gets us much farther, in fact, we get into initram.
This means that basic resource maps are working, initial hypertransport 
setup is working, the amd8111 ISA device is working, config space is 
working for all the parts, we can grow the FLASH part address space to 
more than 64k, and in general we're having a good time. 

Here is the output:
coreboot-3.0.824 Tue Aug 26 22:18:21 PDT 2008 starting... 
(console_loglevel=8)
Choosing fallback boot.
LAR: Attempting to open 'fallback/initram/segment0'.
LAR: Start 0xfff80000 len 0x80000
LAR: normal/option_table@0xfff80000, size 1776
LAR: normal/initram/segment0@0xfff80740, size 24404
LAR: normal/stage2/segment0@0xfff866f0, size 1
LAR: normal/stage2/segment1@0xfff86750, size 18542
LAR: normal/stage2/segment2@0xfff8b010, size 559
LAR: normal/payload/segment0@0xfff8b290, size 18142
LAR: bootblock@0xffff7fc0, size 32768
LAR: File not found!
LAR: Run file fallback/initram/segment0 failed: No such file.
Fallback failed. Try normal boot
LAR: Attempting to open 'normal/initram/segment0'.
LAR: Start 0xfff80000 len 0x80000
LAR: normal/option_table@0xfff80000, size 1776
LAR: normal/initram/segment0@0xfff80740, size 24404
LAR: CHECK normal/initram/segment0 @ 0xfff80740
start 0xfff80790 len 24404 reallen 24404 compression 0 entry 0x00000004 
loadaddress 0x00000000
Entry point is 0xfff80794
Hi there from stage1
stage1 returns
run_file returns with 0

Goal for tomorrow is to get initram done. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@826 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-27 05:30:50 +00:00
..
amd/k8 This set of changes gets us much farther, in fact, we get into initram. 2008-08-27 05:30:50 +00:00
arch Now version 3: LinuxBIOS -> coreboot rename. 2008-01-27 18:54:57 +00:00
amd_geodelx.h 1. geodelx.c: cover case of unterminated DRAM by adding a terminated 2008-07-29 15:54:46 +00:00
byteorder.h Use the same naming convention and placement for "include guards" in 2007-05-21 06:48:47 +00:00
cpu.h The ABI wrapper from r775 made the SHARED definitions obsolete. They're 2008-08-17 21:51:13 +00:00
div64.h Now version 3: LinuxBIOS -> coreboot rename. 2008-01-27 18:54:57 +00:00
io.h Use the same naming convention and placement for "include guards" in 2007-05-21 06:48:47 +00:00
lapic.h Add lapic defines and support. 2008-08-11 23:02:34 +00:00
lapic_def.h Add lapic defines and support. 2008-08-11 23:02:34 +00:00
legacy.h Now version 3: LinuxBIOS -> coreboot rename. 2008-01-27 18:54:57 +00:00
macros.h Minor cosmetic and/or license header fixes (trivial). 2008-08-11 21:01:54 +00:00
msr.h A lot of the v3 header files require other header files to be #included 2008-02-19 00:34:32 +00:00
mtrr.h The m57sli almost builds. It's pretty empty. The dtc is not run . 2008-08-01 17:03:22 +00:00
pci_ops.h Console: 2008-08-09 21:03:57 +00:00
pciconf.h Remove dead code protected by #if 0 since it appeared. 2008-02-15 23:58:09 +00:00
pirq_routing.h Minor cosmetic and/or license header fixes (trivial). 2008-08-11 21:01:54 +00:00
swab.h Now version 3: LinuxBIOS -> coreboot rename. 2008-01-27 18:54:57 +00:00
types.h Use the same naming convention and placement for "include guards" in 2007-05-21 06:48:47 +00:00