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Stefan Reinauer e50c79cea1 beltino: Fix WIFI and LAN ports 
PCIECLOCK-2 is used for LAN, -3 for WIFI and -4 for the NGFF slot.
Hence only disable PCIECLOCK-1 and -5. Also fix coding style for
pcie_port_coalesce.

BRANCH=none
TEST=See WIFI and LAN devices in lspci
BUG=none

Change-Id: I72a2aa8355137aa06e597913e47d5ffb37908a4f
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/173582
Tested-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-by: Ronald Minnich <rminnich@chromium.org>
Commit-Queue: David James <davidjames@chromium.org>
2013-10-19 07:24:14 +00:00
..
arch x86: add common definitions for control registers 2013-10-10 20:48:43 +00:00
console ARM: Generalize armv7 as arm. 2013-10-02 09:18:44 +00:00
cpu coreboot: config to cache ramstage outside CBMEM 2013-10-11 23:27:01 +00:00
device ARM: Generalize armv7 as arm. 2013-10-02 09:18:44 +00:00
drivers drivers/gma: remove unused code 2013-10-11 20:36:54 +00:00
ec chromeec: Implement full battery workaround at 6% 2013-09-16 23:31:17 +00:00
include coreboot: config to cache ramstage outside CBMEM 2013-10-11 23:27:01 +00:00
lib coreboot: config to cache ramstage outside CBMEM 2013-10-11 23:27:01 +00:00
mainboard beltino: Fix WIFI and LAN ports 2013-10-19 07:24:14 +00:00
northbridge PEPPY, Haswell: refactor and create set_translation_table function in haswell/gma.c 2013-10-01 17:56:28 +00:00
soc tegra124: extend chip.h to include video settings 2013-10-19 03:15:30 +00:00
southbridge lynxpoint: Export pch_enable_lpc() for SuperIO systems 2013-10-11 03:57:57 +00:00
superio Drop prototype guarding for romcc 2013-05-10 11:55:20 -07:00
vendorcode vboot: provide empty vboot_verify_firmware() 2013-10-15 22:27:27 +00:00
Kconfig coreboot: config to cache ramstage outside CBMEM 2013-10-11 23:27:01 +00:00