Kyösti Mälkki 5791123356 cpu/intel/hyperthreading: Use initial LAPIC IDs ... For older CPU models where CPUID leaf 0xb is not supported, use initial LAPIC ID from CPUID instead of LAPIC register space to to detect if logical CPU is a hyperthreading sibling. The one in LAPIC space is more complex to read, and might not reflect CPU topology as it can be modified in XAPIC mode. Change-Id: I8c458824db1ea66948126622a3e0d0604e391e4b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58385 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>		2021-10-18 12:31:15 +00:00
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acpi	treewide: Remove "this file is part of" lines	2020-05-11 17:11:40 +00:00
common.h	cpu/intel/common: rework code previously moved to common cpu code	2020-10-24 09:53:26 +00:00
common_init.c	soc/amd/cezanne,soc/intel/common: rework CPPC table generation	2021-10-13 13:51:24 +00:00
fsb.c	cpu: add missing arch/cpu.h includes	2021-09-17 20:28:09 +00:00
hyperthreading.c	cpu/intel/hyperthreading: Use initial LAPIC IDs	2021-10-18 12:31:15 +00:00
Kconfig	cpu/intel/common: Fill cpu voltage in SMBIOS tables	2020-11-22 22:31:40 +00:00
Makefile.inc	cpu/intel/common: Fill cpu voltage in SMBIOS tables	2020-11-22 22:31:40 +00:00
voltage.c	cpu/intel/common: Fill cpu voltage in SMBIOS tables	2020-11-22 22:31:40 +00:00