coreboot/src
Felix Singer e4047354ec mb/intel/coffeelake_rvp: Rework Kconfig
Rework Kconfig file that each variant has its own config option with
their specific selects / configuration and move common selects to
`BOARD_INTEL_COFFEELAKE_COMMON`, which is used as base for each
variant.

Also, move selects from Kconfig.name to Kconfig so that the
configuration is at one place and not distributed over two files.

Built each variant with `BUILD_TIMELESS=1` and all generated
coreboot.rom files remain identical. Excluded the .config file by
disabling `INCLUDE_CONFIG_FILE` to make this reproducible.

Change-Id: I3b3d3cff5ea7a3f4d1c4ddd911240763e4891e06
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56217
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
2021-10-19 18:55:00 +00:00
..
acpi acpi/acpigen: Constify CST functions' pointers 2021-10-19 14:57:39 +00:00
arch arch/x86: Increase MAX_SMBIOS_SIZE 2021-10-19 14:40:09 +00:00
commonlib src/acpi to src/lib: Fix spelling errors 2021-10-05 18:06:39 +00:00
console src/acpi to src/lib: Fix spelling errors 2021-10-05 18:06:39 +00:00
cpu cpu/intel/speedstep: Constify get_cst_entries() 2021-10-19 15:00:01 +00:00
device src/acpi to src/lib: Fix spelling errors 2021-10-05 18:06:39 +00:00
drivers drivers/generic/ioapic: Drop enable_virtual_wire 2021-10-17 18:09:01 +00:00
ec ec/google/chromeec: Register USB-C mux operations 2021-10-06 22:20:32 +00:00
include cpu/intel/speedstep: Constify get_cst_entries() 2021-10-19 15:00:01 +00:00
lib arch/x86,cpu/x86,lib/thread: Remove usage of cpu_info from lib/thread 2021-10-18 12:36:30 +00:00
mainboard mb/intel/coffeelake_rvp: Rework Kconfig 2021-10-19 18:55:00 +00:00
northbridge ACPI: Have common acpi_fill_mcfg() 2021-10-18 14:20:28 +00:00
security Revert "vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main" 2021-10-15 13:00:32 +00:00
soc soc/intel/common/block/cse: Use newly added create-cse-region 2021-10-19 16:32:30 +00:00
southbridge southbridge/intel/common: Add an option to allow stitching of CSE binary 2021-10-19 16:08:58 +00:00
superio src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
vendorcode vc/amd/fsp/cezanne: Add UPD fsp_owns_pcie_resets to FSP-M for Cezanne 2021-10-11 15:55:35 +00:00
Kconfig lib/thread: Switch to using CPU_INFO_V2 2021-10-05 22:39:16 +00:00