coreboot/src/cpu/intel
Kyösti Mälkki e1e658ad29 UPSTREAM: intel: Fix romstage main() with asmlinkage
Backport from haswell.

Change-Id: I585639f8af47bd1d8c606789ca026c6d2d0cc785
Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com>
Original-Reviewed-on: https://review.coreboot.org/15225
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
(cherry-picked from commit e325b223a2)
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/354188
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
2016-06-21 17:13:34 -07:00
..
car UPSTREAM: intel: Fix romstage main() with asmlinkage 2016-06-21 17:13:34 -07:00
common/acpi CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
ep80579 tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
fit CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
fsp_model_206ax x86 chipsets: utilize x86_setup_mtrrs_with_detect() 2016-03-08 23:58:01 +01:00
fsp_model_406dx Remove #ifdef checks on Kconfig symbols 2015-12-06 18:46:12 +01:00
haswell UPSTREAM: intel cache_as_ram: Fix typo in comment 2016-06-20 20:09:55 -07:00
hyperthreading CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
microcode cpu/intel/microcode: allow microcode to be loaded in romstage 2016-02-10 18:08:28 +01:00
model_6bx tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
model_6dx CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
model_6ex tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
model_6fx tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
model_6xx CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
model_65x tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
model_67x tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
model_68x tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
model_69x cpu: microcode: Use microcode stored in binary format 2015-09-30 06:57:19 +00:00
model_106cx x86/smm: Initialize SMM on some CPUs one-by-one 2015-12-02 00:38:45 +01:00
model_206ax UPSTREAM: intel/model_206ax: Move platform specific defines 2016-06-20 20:09:52 -07:00
model_1067x tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
model_2065x UPSTREAM: Fix some cbmem.h includes 2016-06-20 20:09:48 -07:00
model_f0x CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
model_f1x CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
model_f2x CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
model_f3x CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
model_f4x CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
slot_1 tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
slot_2 CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
smm/gen1 CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
socket_441 cpu: get rid of socket source code 2015-05-04 22:18:23 +02:00
socket_BGA956 x86: remove cpu_incs as romstage Make variable 2015-09-04 15:09:32 +00:00
socket_BGA1284 cpu/intel: Add socket BGA1284 2015-11-10 00:19:01 +01:00
socket_FC_PGA370 tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
socket_FCBGA559 cpu/intel/socket_FCBGA559: Add new socket for Atom D5xx 2015-11-24 14:39:42 +01:00
socket_LGA771 x86: remove cpu_incs as romstage Make variable 2015-09-04 15:09:32 +00:00
socket_LGA775 UPSTREAM: intel/cache_as_ram_ht.inc: Fix include 2016-06-20 20:09:57 -07:00
socket_LGA1155 cpu: get rid of socket source code 2015-05-04 22:18:23 +02:00
socket_mFCBGA479 x86: remove cpu_incs as romstage Make variable 2015-09-04 15:09:32 +00:00
socket_mFCPGA478 x86: remove cpu_incs as romstage Make variable 2015-09-04 15:09:32 +00:00
socket_mPGA478 cpu: get rid of socket source code 2015-05-04 22:18:23 +02:00
socket_mPGA479M x86: remove cpu_incs as romstage Make variable 2015-09-04 15:09:32 +00:00
socket_mPGA603 cpu: get rid of socket source code 2015-05-04 22:18:23 +02:00
socket_mPGA604 UPSTREAM: intel/cache_as_ram_ht.inc: Fix include 2016-06-20 20:09:57 -07:00
socket_PGA370 northbridge/intel/i440bx: Unify UDELAY selection 2016-03-10 16:55:35 +01:00
socket_rPGA988B Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in Kconfig 2015-08-25 17:36:45 +00:00
socket_rPGA989 Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in Kconfig 2015-08-25 17:36:45 +00:00
speedstep tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
thermal_monitoring CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
turbo tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
Kconfig cpu/intel/socket_FCBGA559: Add new socket for Atom D5xx 2015-11-24 14:39:42 +01:00
Makefile.inc Make MRC vs native a config rather than making a separate chipset for it. 2016-02-12 17:09:05 +01:00