coreboot/src/vendorcode/amd
Felix Held b65845cb2b vc/amd/fsp/cezanne,mendocino: add FSP CCX CPPC HOB GUID and struct
To generate a complete _CPC ACPI object, coreboot needs the minimal and
nominal core speed values which are specific to the CPU and not only the
CPU family. Since this is done by an undocumented mechanism, FSP has to
do this and puts the information we need into a HOB. This adds the HOB
GUID and the structure of the HOB data.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Change-Id: Ibf338c32de367a3fd57695873da1625338fa196d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66549
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-08-13 19:28:24 +00:00
..
agesa vc/amd/agesa/f15tn: Declare value as constant in GnbRegisterWriteTNDump() 2022-06-08 16:21:59 +00:00
cimx vendorcode/amd/cimx/sb900: Drop code 2022-05-11 05:59:06 +00:00
fsp vc/amd/fsp/cezanne,mendocino: add FSP CCX CPPC HOB GUID and struct 2022-08-13 19:28:24 +00:00
include treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
pi amd/*/gcccar.inc: Replace local declarations 2022-05-11 13:55:18 +00:00
Kconfig vc/amd/agesa/f.../Proc/Mem/Tech/DDR3: Support XMP memory profiles 2020-12-02 17:05:39 +00:00
Makefile.inc