coreboot/src/soc/ucb/riscv
Jonathan Neuschäfer 195924d6ac UPSTREAM: soc/ucb/riscv: select BOOTBLOCK_CONSOLE
BUG=None
BRANCH=None
TEST=None

Signed-off-by: Jonathan Neuschfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/16158
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

Change-Id: I847d7686dec04e9fae7db13d53adc8ca32c56f3a
Reviewed-on: https://chromium-review.googlesource.com/370705
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-08-15 18:36:13 -07:00
..
cbmem.c UPSTREAM: arch/riscv: Move CBMEM into RAM 2016-07-15 08:39:35 -07:00
Kconfig UPSTREAM: soc/ucb/riscv: select BOOTBLOCK_CONSOLE 2016-08-15 18:36:13 -07:00
Makefile.inc kbuild: automatically include SOCs 2015-04-29 18:11:30 +02:00