coreboot/src/soc/intel
Aaron Durbin d7a92a5f9d UPSTREAM: soc/intel/apollolake: add dual rank option to meminit
Despite the UPD comments the Chx_RankEnable fields are a bit
mask which indicates which ranks are enabled for physical
channel. Add the ability to set the rank mask correctly for
dual rank LPDDR4 modules.

BUG=chrome-os-partner:55446

Change-Id: I9dbed7bb6a4b512e57f6b4481180932a7cce91ff
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/15771
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/362688
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
2016-07-23 13:05:02 -07:00
..
apollolake UPSTREAM: soc/intel/apollolake: add dual rank option to meminit 2016-07-23 13:05:02 -07:00
baytrail UPSTREAM: soc/intel/baytrail: use common Intel ACPI hardware definitions 2016-07-15 08:39:59 -07:00
braswell UPSTREAM: soc/intel/braswell: use common Intel ACPI hardware definitions 2016-07-15 08:40:01 -07:00
broadwell UPSTREAM: soc/intel/broadwell: use common Intel ACPI hardware definitions 2016-07-15 08:40:08 -07:00
common UPSTREAM: soc/intel/common: Add reset_prepare() for common reset 2016-07-19 18:33:24 -07:00
fsp_baytrail UPSTREAM: soc/intel/fsp_baytrail: use common Intel ACPI hardware definitions 2016-07-15 08:40:10 -07:00
fsp_broadwell_de UPSTREAM: soc/intel/fsp_broadwell_de: use common Intel ACPI hardware definitions 2016-07-15 08:40:06 -07:00
quark UPSTREAM: soc/intel/quark: Fix legacy GPIO reads 2016-07-21 11:21:56 -07:00
sch UPSTREAM: intel/sch: Merge northbridge and southbridge in src/soc 2016-05-20 17:08:20 -07:00
skylake UPSTREAM: soc/intel/skylake: provide poweroff() implementation 2016-07-15 16:50:31 -07:00