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UPSTREAM: soc/intel/skylake: provide poweroff() implementation

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Implement poweroff() by putting the chipset into ACPI S5 state.

BUG=chrome-os-partner:54977

Change-Id: I9288dcee13347a8aa3f822ca3d75148ba2792859
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/15688
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Original-Tested-by: build bot (Jenkins)
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/360848
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
Aaron Durbin 2016-07-14 00:56:58 -05:00 • committed by chrome-bot
commit a4d112e17e
1 changed files with 7 additions and 0 deletions
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7
src/soc/intel/skylake/pmutil.c
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@ -24,6 +24,7 @@
#include <device/pci.h>
#include <device/pci_def.h>
#include <console/console.h>
#include <halt.h>
#include <stdlib.h>
#include <soc/gpio.h>
#include <soc/iomap.h>
@ -430,3 +431,9 @@ uint16_t pmc_tco_regs(void)
return reg16;
}
void poweroff(void)
{
enable_pm1_control(SLP_EN | (SLP_TYP_S5 << SLP_TYP_SHIFT));
halt();
}