coreboot/src/cpu/amd
Furquan Shaikh c9b138ba79 coreboot: Introduce stage-specific architecture for coreboot
Make all three coreboot stages (bootblock, romstage and ramstage) aware of the
architecture specific to that stage i.e. we will have CONFIG_ARCH variables for
each of the three stages. This allows us to have an SOC with any combination of
architectures and thus every stage can be made to run on a completely different
architecture independent of others. Thus, bootblock can have an x86 arch whereas
romstage and ramstage can have arm32 and arm64 arch respectively. These stage
specific CONFIG_ARCH_ variables enable us to select the proper set of toolchain
and compiler flags for every stage.

These options can be considered as either arch or modes eg: x86 running in
different modes or ARM having different arch types (v4, v7, v8). We have got rid
of the original CONFIG_ARCH option completely as every stage can have any
architecture of its own. Thus, almost all the components of coreboot are
identified as being part of one of the three stages (bootblock, romstage or
ramstage). The components which cannot be classified as such e.g. smm, rmodules
can have their own compiler toolset which is for now set to *_i386. Hence, all
special classes are treated in a similar way and the compiler toolset is defined
using create_class_compiler defined in Makefile.

In order to meet these requirements, changes have been made to CC, LD, OBJCOPY
and family to add CC_bootblock, CC_romstage, CC_ramstage and similarly others.
Additionally, CC_x86_32 and CC_armv7 handle all the special classes. All the
toolsets are defined using create_class_compiler.

Few additional macros have been introduced to identify the class to be used at
various points, e.g.: CC_$(class) derives the $(class) part from the name of
the stage being compiled.

We have also got rid of COREBOOT_COMPILER, COREBOOT_ASSEMBLER and
COREBOOT_LINKER as they do not make any sense for coreboot as a whole. All these
attributes are associated with each of the stages.

BUG=None
BRANCH=None
TEST=Compiled successfully for all mainboard/google boards. Image booted
successfully on link, rambi and nyan.

Change-Id: I10d36ff950712756fb16dcb4d315924d177846b5
Reviewed-on: https://chromium-review.googlesource.com/195574
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
2014-05-09 04:41:47 +00:00
..
agesa coreboot: Introduce stage-specific architecture for coreboot 2014-05-09 04:41:47 +00:00
car coreboot: Rename coreboot_ram stage to ramstage 2014-05-07 23:30:23 +00:00
dualcore AMD northbridges: drop dead code 2012-07-18 10:31:08 +02:00
geode_gx1 coreboot: Introduce stage-specific architecture for coreboot 2014-05-09 04:41:47 +00:00
geode_gx2 coreboot: Introduce stage-specific architecture for coreboot 2014-05-09 04:41:47 +00:00
geode_lx coreboot: Introduce stage-specific architecture for coreboot 2014-05-09 04:41:47 +00:00
microcode GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
model_10xxx coreboot: Introduce stage-specific architecture for coreboot 2014-05-09 04:41:47 +00:00
model_fxx coreboot: Introduce stage-specific architecture for coreboot 2014-05-09 04:41:47 +00:00
mtrr AMD: Drop six copies of wrmsr_amd and rdmsr_amd 2013-04-04 04:52:18 +02:00
quadcore GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
sc520 coreboot: Introduce stage-specific architecture for coreboot 2014-05-09 04:41:47 +00:00
smm GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
socket_754 x86: unify amd and non-amd MTRR routines 2013-03-22 04:06:42 +01:00
socket_939 x86: unify amd and non-amd MTRR routines 2013-03-22 04:06:42 +01:00
socket_940 x86: unify amd and non-amd MTRR routines 2013-03-22 04:06:42 +01:00
socket_AM2 x86: unify amd and non-amd MTRR routines 2013-03-22 04:06:42 +01:00
socket_AM2r2 x86: unify amd and non-amd MTRR routines 2013-03-22 04:06:42 +01:00
socket_AM3 x86: unify amd and non-amd MTRR routines 2013-03-22 04:06:42 +01:00
socket_ASB2 x86: unify amd and non-amd MTRR routines 2013-03-22 04:06:42 +01:00
socket_C32 x86: unify amd and non-amd MTRR routines 2013-03-22 04:06:42 +01:00
socket_F x86: unify amd and non-amd MTRR routines 2013-03-22 04:06:42 +01:00
socket_F_1207 x86: unify amd and non-amd MTRR routines 2013-03-22 04:06:42 +01:00
socket_S1G1 x86: unify amd and non-amd MTRR routines 2013-03-22 04:06:42 +01:00
Kconfig AMD Geode cpus: apply un-written naming rules 2012-02-13 21:56:38 +01:00
Makefile.inc C32 legacy code: change CONFIG_CPU_AMD_SOCKET_C32 to CONFIG_CPU_AMD_SOCKET_C32_NON_AGESA 2012-09-19 23:15:27 +02:00