Rui Zhou d1dac66e61 mb/google/nissa/var/rull: add RAM ID H58G56BK8BX068 ... Add RAM ID for DDR Hynix H58G56BK8BX068 BUG=b:378821948 BRANCH=None TEST=boot to kernel success Change-Id: I4c4ad191a5e9703ee0f3bed150c816bfb098daf5 Signed-off-by: Rui Zhou <zhourui@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85117 Reviewed-by: Eric Lai <ericllai@google.com> Reviewed-by: Jayvik Desai <jayvik@google.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com>		2024-11-18 06:55:13 +00:00
..
acpi	acpi_gic: Add helper for platform gicc	2024-10-08 08:58:34 +00:00
arch	arch/x86: Define macros for hard-coded HPET registers	2024-11-09 10:21:25 +00:00
commonlib	mem_chip_info: Add LPDDR5 enums to mem_chip_type	2024-11-13 02:27:23 +00:00
console
cpu	soc/intel/xeon_sp: Reserve PRMRR	2024-11-14 14:29:23 +00:00
device	device: Add helper to identify PCI IOAPICs	2024-11-16 22:08:17 +00:00
drivers	drivers/intel/gma/acpi: Limit OpRegion size	2024-11-17 05:33:49 +00:00
ec	ec/google/chromeec: Fix typo in google_chromeec_get_pd_chip_info	2024-11-06 22:42:52 +00:00
include	device: Add helper to identify PCI IOAPICs	2024-11-16 22:08:17 +00:00
lib	tree: Fix cast an object of type 'nullptr_t' to 'uintptr_t' error	2024-10-29 01:41:41 +00:00
mainboard	mb/google/nissa/var/rull: add RAM ID H58G56BK8BX068	2024-11-18 06:55:13 +00:00
northbridge	nb/via/cx700: Add south module devices to chipset.cb	2024-11-11 09:17:18 +00:00
sbom
security	drivers/pc80/tpm: Remove flag TPM_RDRESP_NEED_DELAY	2024-10-14 15:26:11 +00:00
soc	soc/intel: Assert if pmc_/gpe0_dwX values are not unique	2024-11-18 02:54:56 +00:00
southbridge	southbridge/intel/common: Improve ACPI _PRT method generation	2024-11-14 19:55:04 +00:00
superio
vendorcode	vc/google: Refactor config to set Fn key scancode	2024-11-13 10:07:13 +00:00
Kconfig