coreboot/src
Aaron Durbin c873326d8f baytrail: bring up APs
Bring up the APs using x86 MP infrastructure.

BUG=chrome-os-partner:22862
BRANCH=None
TEST=Built and booted rambi. Noted all cores are brought up.

Change-Id: I9231eff5494444e8eb17ecdc5a0af72a2e5208b5
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/173704
2013-10-22 00:00:11 +00:00
..
arch ARM: Include stdint.h in cpu.h. 2013-10-21 14:56:16 +00:00
console ARM: Generalize armv7 as arm. 2013-10-02 09:18:44 +00:00
cpu x86: parallel MP initialization 2013-10-22 00:00:07 +00:00
device ARM: Generalize armv7 as arm. 2013-10-02 09:18:44 +00:00
drivers drivers/gma: remove unused code 2013-10-11 20:36:54 +00:00
ec chromeec: Implement full battery workaround at 6% 2013-09-16 23:31:17 +00:00
include x86: parallel MP initialization 2013-10-22 00:00:07 +00:00
lib coreboot: config to cache ramstage outside CBMEM 2013-10-11 23:27:01 +00:00
mainboard baytrail boards: add BSP lapic device 2013-10-21 21:10:32 +00:00
northbridge PEPPY, Haswell: refactor and create set_translation_table function in haswell/gma.c 2013-10-01 17:56:28 +00:00
soc baytrail: bring up APs 2013-10-22 00:00:11 +00:00
southbridge lynxpoint: Export pch_enable_lpc() for SuperIO systems 2013-10-11 03:57:57 +00:00
superio Drop prototype guarding for romcc 2013-05-10 11:55:20 -07:00
vendorcode vboot: provide empty vboot_verify_firmware() 2013-10-15 22:27:27 +00:00
Kconfig coreboot: config to cache ramstage outside CBMEM 2013-10-11 23:27:01 +00:00