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coreboot/src/northbridge/intel
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Arthur Heymans c1ca6588bd nb/intel/sandybridge: Fix uninitialised variable 
GCC with LTO caught this.

Change-Id: I9f78b9973729bdedb40bd63b8989e94c9c498814
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84055
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2024-08-30 07:37:29 +00:00
..
common
e7505 cpu/x86: Make 1GB paging the default 2024-06-05 20:31:03 +00:00
gm45 nb/intel/*: Match ACPI with resource allocation 2024-08-05 08:28:44 +00:00
haswell nb/intel/haswell: Move SPD addresses to devicetree 2024-08-26 11:08:14 +00:00
i440bx cbmem_top: Change the return value to uintptr_t 2024-07-10 12:55:46 +00:00
i945 nb/intel/*: Match ACPI with resource allocation 2024-08-05 08:28:44 +00:00
ironlake nb/intel/*: Match ACPI with resource allocation 2024-08-05 08:28:44 +00:00
pineview nb/intel/*: Match ACPI with resource allocation 2024-08-05 08:28:44 +00:00
sandybridge nb/intel/sandybridge: Fix uninitialised variable 2024-08-30 07:37:29 +00:00
x4x nb/intel/*: Match ACPI with resource allocation 2024-08-05 08:28:44 +00:00