nb/intel/sandybridge: Fix uninitialised variable

GCC with LTO caught this.

Change-Id: I9f78b9973729bdedb40bd63b8989e94c9c498814
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84055
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/northbridge/intel/sandybridge/raminit.c

@@ -340,7 +340,7 @@ static void init_dram_ddr3(int s3resume, const u32 cpuid)
 	int me_uma_size, cbmem_was_inited, fast_boot, err;
 	ramctr_timing ctrl;
 	spd_ddr3_raw_data spds[4];
-	size_t mrc_size;
+	size_t mrc_size = 0;
 	ramctr_timing *ctrl_cached = NULL;
 
 	timestamp_add_now(TS_INITRAM_START);