coreboot/src/soc/amd
Karthikeyan Ramasubramanian b5ff9b9f3f soc/amd/sabrina: Do not pass SHA operation mode
Currently only SHA_GENERIC is used and does not need to be passed.

BUG=b:217414563
TEST=Build and boot to OS in Skyrim with PSP and x86 verstage.

Change-Id: Id705b1361fffaf940c51515e7f77d7fb0677fc4a
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66133
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-07-27 13:41:19 +00:00
..
cezanne soc/amd: Fix some white spaces issues 2022-07-17 22:03:37 +00:00
common soc/amd/common/block/spi/fch_spi_ctrl: Fix restricted command write 2022-07-20 22:22:14 +00:00
picasso treewide: Remove unused <cpu/x86/msr.h> 2022-07-20 13:16:52 +00:00
sabrina soc/amd/sabrina: Do not pass SHA operation mode 2022-07-27 13:41:19 +00:00
stoneyridge soc/amd: Fix some white spaces issues 2022-07-17 22:03:37 +00:00