coreboot/src/southbridge/intel/common
Husni Faiz f571ce5c67 bd82x6x/early_pch: enable smbus in bootblock stage
SMBus is typically enabled in the ROMSTAGE. To get the
BOOTBLOCK console message, the SMBus should be enabled
in the BOOTBLOCK stage.

Change-Id: I97d0afb013ede428383acaa0aa97ab04fe80e2a4
Signed-off-by: Husni Faiz <ahamedhusni73@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67340
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-09-16 17:02:39 +00:00
..
acpi arch/x86/acpi: Consolidate POST code handling 2022-05-04 13:11:00 +00:00
firmware sb/intel/common/firmware: Hook up adding 10GbE LAN firmware 2022-03-08 15:04:03 +00:00
acpi_pirq_gen.c src/southbridge: Remove unused <string.h> 2022-01-05 17:38:18 +00:00
acpi_pirq_gen.h
early_smbus.c src: Make PCI ID define names shorter 2022-03-07 08:32:09 +00:00
early_smbus.h
early_spi.h
finalize.c
finalize.h
gpio.c
gpio.h
hpet.c sb/intel/common/hpet: use HPET_BASE_ADDRESS definition 2022-02-25 17:42:59 +00:00
hpet.h
Kconfig.common
madt.c
Makefile.inc bd82x6x/early_pch: enable smbus in bootblock stage 2022-09-16 17:02:39 +00:00
me.c
me.h
pciehp.c southbridge/intel: Remove unused <acpi/acpi.h> 2022-04-24 21:10:30 +00:00
pciehp.h
pmbase.c
pmbase.h
pmclib.c
pmclib.h
pmutil.c
pmutil.h
rcba.h
rcba_pirq.c sb/intel/common/rcba_pirq: Use correct size_t length modifier 2021-12-23 14:33:50 +00:00
rcba_pirq.h
reset.c
rtc.c
rtc.h
smbus.c
smbus_ops.c
smbus_ops.h
smi.c
smihandler.c
spi.c treewide: Remove "ERROR: "/"WARN: " prefixes from log messages 2022-02-07 23:29:09 +00:00
spi.h
tco.h
usb_debug.c
watchdog.c