coreboot/src/southbridge/intel
Husni Faiz f571ce5c67 bd82x6x/early_pch: enable smbus in bootblock stage
SMBus is typically enabled in the ROMSTAGE. To get the
BOOTBLOCK console message, the SMBus should be enabled
in the BOOTBLOCK stage.

Change-Id: I97d0afb013ede428383acaa0aa97ab04fe80e2a4
Signed-off-by: Husni Faiz <ahamedhusni73@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67340
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-09-16 17:02:39 +00:00
..
bd82x6x bd82x6x/early_pch: enable smbus in bootblock stage 2022-09-16 17:02:39 +00:00
common bd82x6x/early_pch: enable smbus in bootblock stage 2022-09-16 17:02:39 +00:00
i82371eb sb/intel/{i82371eb/i82801dx}: select BOOT_DEVICE_NOT_SPI_FLASH 2022-04-27 06:55:30 +00:00
i82801dx sb/intel/i82801dx/pci.c: Use pci_or_config16() and macros 2022-04-29 14:41:09 +00:00
i82801gx {sb,soc}/intel: Do not require hda_verb.c 2022-08-23 14:04:47 +00:00
i82801ix {sb,soc}/intel: Do not require hda_verb.c 2022-08-23 14:04:47 +00:00
i82801jx {sb,soc}/intel: Do not require hda_verb.c 2022-08-23 14:04:47 +00:00
i82870 src: Make PCI ID define names shorter 2022-03-07 08:32:09 +00:00
ibexpeak {sb,soc}/intel: Do not require hda_verb.c 2022-08-23 14:04:47 +00:00
lynxpoint {sb,soc}/intel: Do not require hda_verb.c 2022-08-23 14:04:47 +00:00