coreboot/src
patrick a6dd4151b4 spi: Support Macronix MX25U6435F SPI ROM.
Patch from Macronix.

BUG=None
TEST=Compiled + verified system boot
BRANCH=Rambi
Signed-off-by: Patrick Ha <patrick@samsung.com>

Change-Id: I932b7041f6409ed8a5e65580e9e983908ab2dd3d
Reviewed-on: https://chromium-review.googlesource.com/211068
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-by: patrick Ha <patrick@samsung.com>
Commit-Queue: patrick Ha <patrick@samsung.com>
Tested-by: patrick Ha <patrick@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/211411
Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org>
Tested-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2014-08-07 22:45:49 +00:00
..
arch arm: add _end symbol to bootblock.ld 2014-08-04 16:34:12 +00:00
console vboot2: implement select_firmware for pre-romstage verification 2014-06-30 18:45:09 +00:00
cpu haswell: Update microcode revision 2014-07-29 04:37:18 +00:00
device i2c: Add software_i2c driver for I2C debugging and emulation 2014-05-19 20:34:31 +00:00
drivers spi: Support Macronix MX25U6435F SPI ROM. 2014-08-07 22:45:49 +00:00
ec chromeec: provide proto v3 over i2c support 2014-08-07 22:38:07 +00:00
include Define gpio polarity values in one place. 2014-08-05 19:49:23 +00:00
lib Include board ID calculations only when necessary 2014-07-30 23:41:10 +00:00
mainboard ryu: convert mainboard initialization to use padconfig API 2014-08-07 22:41:20 +00:00
northbridge coreboot: Rename coreboot_ram stage to ramstage 2014-05-07 23:30:23 +00:00
soc tegra132: move common bootblock init into SoC code 2014-08-07 22:38:18 +00:00
southbridge coreboot: Rename coreboot_ram stage to ramstage 2014-05-07 23:30:23 +00:00
superio pnp: Allow setting of misc register 0xf4 in device tree 2013-12-20 00:37:38 +00:00
vendorcode vboot: fix vboot_load_ramstage() 2014-08-05 02:39:09 +00:00
Kconfig Enable publishing of board ID where supported 2014-07-30 23:41:23 +00:00