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coreboot/src/soc
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Rizwan Qureshi 5941a7f23a UPSTREAM: soc/intel/skylake: Add Maxim 98927 and Realtek 5663 NHLT blob support 
Add APIs and required parameters for creating Maxim 98927
and Realtek 5336 SSP endpoints in NHLT table.

BUG=chrome-os-partner:62051
BRANCH=None
TEST=check that NHLT table created is created properly
CQ-DEPEND=CL:*318887,CL:*315896,CL:*330554

Change-Id: Idce838eaacbc953d6390b6a352802ca877a98d3c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 17335fab17
Original-Change-Id: Ica302aab05c5364faf4923dc5327be8e8eaae8b4
Original-Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Original-Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com>
Original-Signed-off-by: M Naveen <naveen.m@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18213
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/445128
2017-02-23 16:02:00 -08:00
..
broadcom/cygnus UPSTREAM: spi: Get rid of SPI_ATOMIC_SEQUENCING 2017-01-05 11:00:04 -08:00
dmp/vortex86ex UPSTREAM: src/soc: Capitalize CPU, ACPI, RAM and ROM 2016-08-04 23:37:59 -07:00
imgtec/pistachio UPSTREAM: spi: Get rid of SPI_ATOMIC_SEQUENCING 2017-01-05 11:00:04 -08:00
intel UPSTREAM: soc/intel/skylake: Add Maxim 98927 and Realtek 5663 NHLT blob support 2017-02-23 16:02:00 -08:00
lowrisc/lowrisc UPSTREAM: soc/lowrisc: Place CBMEM at top of autodetected RAM 2016-12-08 12:30:55 -08:00
marvell UPSTREAM: soc/marvell/mvmap2315: Mark mvmap2315_reset() as noreturn 2017-01-13 18:41:29 -08:00
mediatek/mt8173 various cleanups from upstream 2017-02-06 05:03:19 -08:00
nvidia UPSTREAM: spi: Define and use spi_ctrlr structure 2016-12-08 12:30:16 -08:00
qualcomm Gale: spi: add vector operation method 2017-02-03 17:52:18 -08:00
rdc/r8610 rdc/r8610: Move to src/soc 2016-05-05 20:08:58 +02:00
rockchip various cleanups from upstream 2017-02-06 05:03:19 -08:00
samsung UPSTREAM: samsung/exynos5420: Fix test for src < 0 2016-12-16 15:42:11 -08:00
ucb/riscv UPSTREAM: soc/ucb/riscv: Place CBMEM at top of autodetected RAM 2016-12-08 12:30:48 -08:00