Add FSP 2.0 support in ramstage. Populate required Fsp Silicon Init params and configure mainboard specific GPIOs. Define function fsp_soc_get_igd_bar needed by fsp2.0 driver for pre OS screens. BUG=None BRANCH=None TEST=None Change-Id: I8cabcd45db2067dbf6dfee6d3780629e1f990d37 Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com> Reviewed-on: https://review.coreboot.org/16592 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/388115 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
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| broadcom/cygnus | ||
| dmp/vortex86ex | ||
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| intel | ||
| marvell | ||
| mediatek/mt8173 | ||
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| qualcomm | ||
| rdc/r8610 | ||
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| ucb/riscv | ||