coreboot/src/cpu
Arthur Heymans 96c25cded4 cpu/intel/model_6fx: Include Conroe-L microcode
This CPU variant has a different CPUID signature.

Change-Id: Ice2c1b86382e5d91d9eda717e6522ed0a9c2229f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44248
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-08-17 06:18:09 +00:00
..
amd arch/x86: Drop CBMEM_TOP_BACKUP 2020-07-11 14:48:25 +00:00
armltd
intel cpu/intel/model_6fx: Include Conroe-L microcode 2020-08-17 06:18:09 +00:00
qemu-power8 src: Remove leading blank lines from SPDX header 2020-05-18 07:00:27 +00:00
qemu-x86 cpu/qemu-x86: Fix timestamp and bist reporting 2020-08-14 17:56:44 +00:00
ti treewide: Add Kconfig variable MEMLAYOUT_LD_FILE 2020-06-13 06:49:23 +00:00
x86 cpu/x86/smm: Introduce SMM module loader version 2 2020-08-15 02:16:32 +00:00
Kconfig arch/x86: Implement RESET_VECTOR_IN_RAM 2020-04-29 05:38:00 +00:00
Makefile.inc cpu/microcode: Fix config CPU_MICROCODE_CBFS_EXTERNAL_BINS 2020-03-04 10:38:55 +00:00