coreboot/src
Arthur Heymans 96c25cded4 cpu/intel/model_6fx: Include Conroe-L microcode
This CPU variant has a different CPUID signature.

Change-Id: Ice2c1b86382e5d91d9eda717e6522ed0a9c2229f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44248
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-08-17 06:18:09 +00:00
..
acpi src/acpi: Add missing <{stdbool,stdint}.h> 2020-07-29 09:37:10 +00:00
arch arch/x86/postcar: Add x86_64 support 2020-08-14 17:55:26 +00:00
commonlib src: Remove unused 'include <stdint.h> 2020-07-14 16:11:10 +00:00
console console: Update for vboot before bootblock 2020-06-15 22:07:12 +00:00
cpu cpu/intel/model_6fx: Include Conroe-L microcode 2020-08-17 06:18:09 +00:00
device device/pci_rom.c: Treat BASE_DISPLAY class as GPU 2020-08-15 05:59:49 +00:00
drivers drivers/intel/fsp2_0: don't select FSP_USES_CB_STACK on FSP 2.0 platform 2020-08-13 16:45:25 +00:00
ec ec/google/chromeec: Add helper to request AP reset 2020-08-14 08:35:15 +00:00
include soc/intel/jasperlake: Add IGD Device ID 2020-08-17 05:15:40 +00:00
lib gpio: Pull down HiZ pins after reading tristate GPIO strapping 2020-08-06 23:54:41 +00:00
mainboard mb/intel/jslrvp: Update SLP_Sx assertion widths and PwrCycDur 2020-08-17 05:14:41 +00:00
northbridge nb/intel/sandybridge: Add comments to struct iosav_ssq 2020-08-12 11:01:44 +00:00
security security/vboot/Makefile.inc: Update regions-for-file function 2020-08-13 05:43:53 +00:00
soc soc/intel/skylake: Call mainboard ACPI sleep methods 2020-08-17 06:08:10 +00:00
southbridge sb/intel/bd82x6x/me_8.x.c: Relocate mkhi_end_of_post 2020-08-13 06:59:29 +00:00
superio superio/ite/it8728f: Correct Kconfig selections 2020-08-14 00:51:37 +00:00
vendorcode vendercode/intel/fsp/fsp2_0/glk: Update FSP header file per v2.2.0 2020-08-14 06:54:58 +00:00
Kconfig arch/x86: Remove RELOCATABLE_RAMSTAGE 2020-07-06 06:17:47 +00:00