Furquan Shaikh 96aed53b28 arm64: Replace CONFIG_* variables with {read/write}_current ... Instead of relying on config variables to determine the current el, use {read/write}_current macros for accessing registers. BUG=chrome-os-partner:30785 BRANCH=None TEST=Compiles successfully and boots to kernel login prompt Change-Id: If4a5d1e9aa50ab180c8012862e2a6c37384f7f91 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/217148 Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org>		2014-09-11 20:00:10 +00:00
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arch	arm64: Replace CONFIG_* variables with {read/write}_current	2014-09-11 20:00:10 +00:00
console	console: Allow bootblock console on MIPS	2014-09-01 11:06:29 +00:00
cpu	imgtec/danube: Add support for ImgTec Danube SoC	2014-09-01 11:06:39 +00:00
device	i2c: Add software_i2c driver for I2C debugging and emulation	2014-05-19 20:34:31 +00:00
drivers	Add support for GigaDevice GD25LQ64C/GD25LB64C SPI ROM.	2014-08-28 01:16:15 +00:00
ec	chromeec: Clear post code before reboot to RO	2014-09-02 20:25:38 +00:00
include	arm, arm64, x86: add vprintk to early console	2014-08-30 09:15:26 +00:00
lib	rmodule: Align module_params to 8-byte	2014-09-11 19:59:58 +00:00
mainboard	storm: deassert SW_RESET signal at startup	2014-09-10 03:28:06 +00:00
northbridge	coreboot: Rename coreboot_ram stage to ramstage	2014-05-07 23:30:23 +00:00
soc	arm64: Replace CONFIG_* variables with {read/write}_current	2014-09-11 20:00:10 +00:00
southbridge	coreboot: Rename coreboot_ram stage to ramstage	2014-05-07 23:30:23 +00:00
superio	pnp: Allow setting of misc register 0xf4 in device tree	2013-12-20 00:37:38 +00:00
vendorcode	coreboot: rk3288: update romstage & mainboard	2014-09-04 15:46:53 +00:00
Kconfig	arch/mips: Add base MIPS architecture support	2014-09-01 11:05:57 +00:00