coreboot/src/arch
Aaron Durbin 956c4f2d4c x86: link romstage and ramstage with 1 file
To reduce file clutter merge romstage.ld and ramstage.ld
into a single memlayout.ld. The naming is consistent with
other architectures and chipsets for their linker script
names. The cache-as-ram linking rules are put into a separate
file such that other rules can be applied for future verstage
support.

BUG=chrome-os-partner:44827
BRANCH=None
TEST=Built rambi and dmp/vortex86ex.

Change-Id: I1e8982a6a28027566ddd42a71b7e24e2397e68d2
Signed-off-by: Aaron Durbin <adubin@chromium.org>
Reviewed-on: http://review.coreboot.org/11521
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-09-09 19:35:42 +00:00
..
arm Drop "See file CREDITS..." comment 2015-09-07 15:54:50 +00:00
arm64 rmodule: use program.ld for linking 2015-09-09 19:35:30 +00:00
mips arm, arm64, mips: Add rough static stack size checks with -Wstack-usage 2015-07-29 20:25:59 +02:00
riscv riscv-trap-handling: Add preliminary trap handling for riscv 2015-08-26 23:50:45 +00:00
x86 x86: link romstage and ramstage with 1 file 2015-09-09 19:35:42 +00:00