Elyes HAOUAS a103bc635a UPSTREAM: src/arch: Improve code formatting ... BUG=None BRANCH=None TEST=None Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16434 Tested-by: build bot (Jenkins) Reviewed-by: Omar Pakker Change-Id: Ic1ca6c2e1cd06800d7eb2d00ac0b328987d022ef Reviewed-on: https://chromium-review.googlesource.com/384973 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2016-09-13 22:20:24 -07:00
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include	UPSTREAM: src/arch: Improve code formatting	2016-09-13 22:20:24 -07:00
boot.c	UPSTREAM: arch/riscv: Unconditionally start payloads in machine mode	2016-07-15 08:39:21 -07:00
bootblock.S	UPSTREAM: arch/riscv: Refactor bootblock.S	2016-08-02 14:29:10 -07:00
bootblock_simple.c	arm/arm64: Generalize bootblock C entry point	2015-11-11 05:08:07 +01:00
id.ld	arch/riscv: Add missing license headers	2016-01-18 02:14:03 +01:00
id.S	UPSTREAM: src/arch/riscv/id.S: Don't hardcode the strings	2016-08-11 20:39:57 -07:00
Kconfig	console: Simplify bootblock console Kconfig selection logic	2016-01-21 05:37:27 +01:00
Makefile.inc	UPSTREAM: arch/riscv: Implement the SBI again	2016-08-24 17:40:16 -07:00
misc.c	arch/riscv: Add missing license headers	2016-01-18 02:14:03 +01:00
prologue.inc	tree: drop last paragraph of GPL copyright header	2015-10-31 21:37:39 +01:00
sbi.S	UPSTREAM: arch/riscv: Implement the SBI again	2016-08-24 17:40:16 -07:00
stages.c	arch: remove stage_exit()	2016-02-11 23:12:06 +01:00
tables.c	lib: add common write_tables() implementation	2016-04-21 20:49:05 +02:00
trap_handler.c	UPSTREAM: arch/riscv: Add missing "break;"	2016-09-03 23:57:02 -07:00
trap_util.S	UPSTREAM: arch/riscv: Set the stack pointer upon trap entry	2016-08-15 18:36:16 -07:00
virtual_memory.c	UPSTREAM: arch/riscv: Map the kernel space into RAM (2GiB+)	2016-08-24 17:40:18 -07:00