UPSTREAM: arch/riscv: Add missing "break;"

BUG=None
BRANCH=None
TEST=None

Reported-by: Coverity (1361947)
Signed-off-by: Jonathan Neuschfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/16335
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>

Change-Id: Iea3f12a5a7eb37586f5424db2d7a84c4319492f8
Reviewed-on: https://chromium-review.googlesource.com/377862
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/arch/riscv/trap_handler.c

@@ -35,6 +35,7 @@ void handle_supervisor_call(trapframe *tf) {
 			/* TODO: parse the hardware-supplied config string and
 			   return the correct value */
 			returnValue = 1;
+			break;
 		case SBI_ECALL_CONSOLE_PUT:
 			returnValue = mcall_console_putchar(arg0);
 			break;