V Sowmya e8156ad981 soc/intel/jasperlake: Add the SkipCpuReplacementCheck configuration ... Add SkipCpuReplacementCheck config to control the FSPM UPD used for skipping the CPU replacementment check to avoid the forced MRC training for the platforms with soldered down SOC. BUG=b:160201335 TEST=Build and verify CSE Lite SKU on Waddleddo. Cq-Depend: chrome-internal:3142530 Change-Id: I63fcdab3686322406cf7c24fc26cbb535cc58c8d Signed-off-by: V Sowmya <v.sowmya@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42453 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>		2020-07-23 04:54:01 +00:00
..
apollolake	src: Use ACPI macros	2020-07-21 18:26:47 +00:00
baytrail	src: Use ACPI macros	2020-07-21 18:26:47 +00:00
braswell	src: Report word-sized access for PM1a_EVT	2020-07-20 13:33:32 +00:00
broadwell	src: Use ACPI macros	2020-07-21 18:26:47 +00:00
cannonlake	soc/intel/cannonlake: Move tco_configure to bootblock	2020-07-22 21:06:29 +00:00
common	src: Use ACPI macros	2020-07-21 18:26:47 +00:00
denverton_ns	src: Report word-sized access for PM1a_EVT	2020-07-20 13:33:32 +00:00
icelake	src: Use ACPI macros	2020-07-21 18:26:47 +00:00
jasperlake	soc/intel/jasperlake: Add the SkipCpuReplacementCheck configuration	2020-07-23 04:54:01 +00:00
quark	src: Make HAVE_CF9_RESET set the FADT reset register	2020-07-20 13:23:13 +00:00
skylake	src: Use ACPI macros	2020-07-21 18:26:47 +00:00
tigerlake	soc/intel/tigerlake: Select PLATFORM_USES_FSP2_2	2020-07-21 22:57:49 +00:00
xeon_sp	src: Use ACPI macros	2020-07-21 18:26:47 +00:00
Kconfig