coreboot/src/soc
V Sowmya e8156ad981 soc/intel/jasperlake: Add the SkipCpuReplacementCheck configuration
Add SkipCpuReplacementCheck config to control the FSPM UPD used
for skipping the CPU replacementment check to avoid the forced
MRC training for the platforms with soldered down SOC.

BUG=b:160201335
TEST=Build and verify CSE Lite SKU on Waddleddo.
Cq-Depend: chrome-internal:3142530

Change-Id: I63fcdab3686322406cf7c24fc26cbb535cc58c8d
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42453
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
2020-07-23 04:54:01 +00:00
..
amd src: Make HAVE_CF9_RESET set the FADT reset register 2020-07-20 13:23:13 +00:00
cavium src: Remove unused 'include <types.h>' 2020-07-14 16:10:17 +00:00
intel soc/intel/jasperlake: Add the SkipCpuReplacementCheck configuration 2020-07-23 04:54:01 +00:00
mediatek src: Remove unused 'include <stdint.h> 2020-07-14 16:11:10 +00:00
nvidia src: Remove unused 'include <stdint.h> 2020-07-14 16:11:10 +00:00
qualcomm src: Remove unused 'include <stdint.h> 2020-07-14 16:11:10 +00:00
rockchip soc/rockchip/rk3399/display.c: Add missing include 2020-07-14 16:11:42 +00:00
samsung soc/samsung/exynos5420: Drop dead code 2020-07-09 21:37:01 +00:00
sifive treewide: Add Kconfig variable MEMLAYOUT_LD_FILE 2020-06-13 06:49:23 +00:00
ucb soc/ucb/riscv: Add chip_operations stub 2020-05-28 09:30:35 +00:00