coreboot/src
Shon 8f6dd2a4bd mb/google/brya/var/vell: Set empty on USB2_9/USB32_1
The baseboard uses port USB2 #9, and USB3 #1, but vell does not,
therefore set the port configuration to EMPTY.

Change-Id: I0d03b967fd2a051205ad5807f0bd8916bad7c036
Signed-off-by: Shon <shon.wang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64628
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-05-28 04:04:06 +00:00
..
acpi ec/google/chromeec: Add retimer handle to Type C conn 2022-05-04 13:15:30 +00:00
arch Makefile.inc: Add bootblock to CBFS before others 2022-05-27 01:46:24 +00:00
commonlib Treewide: Remove doxygen config files and targets 2022-05-28 01:24:51 +00:00
console console: Make CONSOLE_SPI_FLASH depend on BOOT_DEVICE_SPI_FLASH 2022-04-27 06:55:47 +00:00
cpu cpu/x86/smm: Remove heap 2022-05-23 13:53:26 +00:00
device device: Add log_resource() 2022-05-24 13:08:00 +00:00
drivers CBMEM: Change declarations for initialization hooks 2022-05-20 07:15:39 +00:00
ec ec/starlabs/merlin/glk: Correct offset of USCI 2022-05-25 12:50:27 +00:00
include device: Add log_resource() 2022-05-24 13:08:00 +00:00
lib cpu/x86/smm: Remove heap 2022-05-23 13:53:26 +00:00
mainboard mb/google/brya/var/vell: Set empty on USB2_9/USB32_1 2022-05-28 04:04:06 +00:00
northbridge nb/intel/i945,gm45: Use incrementing index with fixed resource 2022-05-24 14:52:12 +00:00
security security/tpm/crtm: Add a function to measure the bootblock on SoC level 2022-05-24 13:44:28 +00:00
soc soc/intel/tgl: Add PEG devices to PCI constraints 2022-05-28 03:40:45 +00:00
southbridge sb/amd/agesa/hudson/hudson.c: Use BIT() macros 2022-05-16 02:58:36 +00:00
superio superio/nuvoton/nct6687d: Add early support for NCT6687D 2022-05-16 13:11:00 +00:00
vendorcode vc/amd/fsp/sabrina: Update PSP header to set the SOC FW ID 2022-05-20 11:18:41 +00:00
Kconfig Kconfig: Increase x86 postcar & ramstage stack 2022-05-25 12:48:37 +00:00