coreboot/src/soc/intel
Deepti Deshatty 8e7facf343 soc/intel/alderlake: mb/intel/sm: Add tcss code
Enable FSP 'MultiPhaseSilicon' init to execute tcss configure during
silicon init.
Type-c aux lines DC bias changes are propagated from tigerlake
platform.

TEST=Verified superspeed pendrive detection on coldboot.

Signed-off-by: Deepti Deshatty <deepti.deshatty@intel.com>
Change-Id: Ifce6abb0fce20e408931b904426131a42a5a4a36
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54089
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-05-18 10:09:04 +00:00
..
alderlake soc/intel/alderlake: mb/intel/sm: Add tcss code 2021-05-18 10:09:04 +00:00
apollolake src: Drop "This file is part of the coreboot project" lines 2021-05-10 15:07:33 +00:00
baytrail soc/intel/baytrail/pmutil.c: Define __SIMPLE_DEVICE__ 2021-04-19 10:45:15 +00:00
braswell soc/intel/braswell/pmutil.c: Define __SIMPLE_DEVICE__ 2021-04-19 10:45:06 +00:00
broadwell src: Retype option API to use unsigned integers 2021-05-06 14:48:15 +00:00
cannonlake src: Match array format in function declarations and definitions 2021-05-13 18:34:38 +00:00
common soc/intel/alderlake: Update CPU and IGD Device IDs 2021-05-14 09:03:01 +00:00
denverton_ns soc/intel/dnv_ns: hook up new gpio device operations 2021-04-08 06:49:55 +00:00
elkhartlake src: Match array format in function declarations and definitions 2021-05-13 18:34:38 +00:00
icelake src: Match array format in function declarations and definitions 2021-05-13 18:34:38 +00:00
jasperlake src: Match array format in function declarations and definitions 2021-05-13 18:34:38 +00:00
quark mainboards: Drop PWRS from GNVS 2021-02-11 16:35:32 +00:00
skylake src: Match array format in function declarations and definitions 2021-05-13 18:34:38 +00:00
tigerlake soc/intel/tigerlake: Allow devicetree to fill UPD related to TCSS OC 2021-05-14 23:00:01 +00:00
xeon_sp src: Match array format in function declarations and definitions 2021-05-13 18:34:38 +00:00
Kconfig