erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions
coreboot/src
History
Arthur Heymans 8bb2ed82bb mb/*/*: Use libgfxinit on sandy and ivy bridge boards 
Change-Id: I41ad1ce06d9afcc99941affa232fa76ffa6631fb
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/27531
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-01-15 12:53:19 +00:00
..
acpi arch/x86: Add common AMD ACPI hardware definitions 2017-11-10 19:15:38 +00:00
arch arch/x86: Enforce CPU stack alignment 2019-01-14 11:59:51 +00:00
commonlib src: Remove duplicated round up function 2018-11-29 12:17:45 +00:00
console console: Change BOOTBLOCK_CONSOLE default to y 2019-01-14 12:13:55 +00:00
cpu cpu/intel/socket_FCBGA559: Use the non-evict cache as ram setup 2019-01-15 11:38:01 +00:00
device device/pci_device: Do not break tree topology 2019-01-10 12:47:18 +00:00
drivers vendorcode/intel/fsp1_0/broadwell_de: Use FSP from 3rdparty/fsp 2019-01-15 07:45:41 +00:00
ec ec/chromeec: fix LPC read/write for MEC devices 2018-12-28 12:24:52 +00:00
include cpu/intel/car: Prepare for C_ENVIRONMENT_BOOTBLOCK 2019-01-08 15:33:47 +00:00
lib src: Get rid of device_t 2019-01-04 12:11:18 +00:00
mainboard mb/*/*: Use libgfxinit on sandy and ivy bridge boards 2019-01-15 12:53:19 +00:00
northbridge AGESA: Drop CONFIG_CBB and CONFIG_CDB 2019-01-14 19:08:34 +00:00
security tss: implement tlcl_save_state 2018-11-28 18:32:59 +00:00
soc soc/intel/apl: Hook microcode updates up 2019-01-15 09:19:11 +00:00
southbridge AGESA: Drop CONFIG_CBB and CONFIG_CDB 2019-01-14 19:08:34 +00:00
superio src/superio/smsc/smscsuperio/superio.c: Add SCH5504 2019-01-15 09:35:31 +00:00
vendorcode vendorcode/intel/fsp1_0/broadwell_de: Use FSP from 3rdparty/fsp 2019-01-15 07:45:41 +00:00
Kconfig [RFC]util/checklist: Remove this functionality 2019-01-14 19:42:59 +00:00