coreboot/src/soc/amd
Chris Wang 5ec975e31a soc/amd/picasso: Remove xhci0_force_gen1 from soc config
To remove the xhci0_force_gen1 and use usb3_port_force_gen1 instead.
The xhci0_force_gen1 is used for force all port on xhci0 to USB3 GEN1.
Now variant can use the usb3_port_force_gen1 to customize which port
it needs to limit.

BUG=b:167651308
BRANCH=zork
TEST=Build, verify the USB3 speed in gen1

Signed-off-by: Chris Wang <chris.wang@amd.corp-partner.google.com>
Change-Id: If5f0c1f22d8c98c4461f09d074bf082c340b14d9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46041
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Sam McNally <sammc@google.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-10-08 01:30:36 +00:00
..
common soc/amd: Drop unneeded empty lines 2020-09-21 16:30:40 +00:00
picasso soc/amd/picasso: Remove xhci0_force_gen1 from soc config 2020-10-08 01:30:36 +00:00
stoneyridge drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES config 2020-10-02 23:11:04 +00:00
Kconfig soc/amd: Add picasso to Kconfig 2019-07-02 14:33:42 +00:00