coreboot/src/soc
Eric Lai 7f1e9dbf3a soc/intel/cannonlake/acpi: Add board level s0ix call back
Add board level s0ix call back. Since some driver doesn't
care _ON/_OFF method. Add a control method for s0ix usage.

BUG=b:129177593
TEST=NA

Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I404f388b19355ae89b36d1fb07f9fb4f97eb3b2d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32539
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2019-05-06 10:34:35 +00:00
..
amd soc/amd/stoneyridge: Correct bugs in lpc.c 2019-05-06 10:33:03 +00:00
cavium soc/cavium/common/bootblock: Remove unused variables 2019-04-25 15:55:27 +00:00
imgtec arch/mips: Fix <arch/mmio.h> prototypes 2019-03-22 12:18:41 +00:00
intel soc/intel/cannonlake/acpi: Add board level s0ix call back 2019-05-06 10:34:35 +00:00
mediatek mediatek/mt8183: Wait 200us for voltages to settle 2019-05-06 10:27:53 +00:00
nvidia vboot: refactor OPROM code 2019-04-30 21:47:25 +00:00
qualcomm Fix code that would trip -Wtype-limits 2019-05-06 10:32:15 +00:00
rockchip Fix code that would trip -Wtype-limits 2019-05-06 10:32:15 +00:00
samsung Fix code that would trip -Wtype-limits 2019-05-06 10:32:15 +00:00
sifive src/mb/sifive/hifive-unleashed: initialize Gigabit Ethernet Controller 2019-03-18 09:12:46 +00:00
ucb riscv: Add initial support for 32bit boards 2019-02-13 04:49:14 +00:00