fd2cdf206d
For most targets it's known if the CPU supports alternative SMRR registers or not. Only on model_6fx runtime detection is necessary. On all platforms this allows the compiler to optimize the code and thus shrink the code size if alternative SMRR aren't supported. TEST=On Lenovo X220 the ramstage is 308 bytes smaller. Change-Id: I3a965d142f79ad587b8cedc9b4646b05e2a45f8b Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/91014 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> |
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| .. | ||
| cpu_ids.h | ||
| em64t100_save_state.h | ||
| em64t101_save_state.h | ||
| fsb.h | ||
| l2_cache.h | ||
| microcode.h | ||
| msr.h | ||
| post_codes.h | ||
| smm_reloc.h | ||
| speedstep.h | ||
| turbo.h | ||