coreboot/src/soc/amd
Patrick Rudolph e021937f35 soc/amd/glinda: Add RAS Kconfig options
On Faegan the FSP supports RAS. Allow the user to configure
RAS features and pass them to the FSP using UPDs.

Change-Id: Ia7091d216a446d56632e64f9bba0e2a166410139
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91819
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
2026-03-25 18:42:20 +00:00
..
cezanne
common soc/amd/common/block/spi: Check if ROM Armor is enforced 2026-03-24 14:46:45 +00:00
genoa_poc
glinda soc/amd/glinda: Add RAS Kconfig options 2026-03-25 18:42:20 +00:00
mendocino
phoenix
picasso
stoneyridge
turin_poc soc/amd/turin_poc: Add SPI TPM SoC-specific initialization 2026-03-02 14:38:58 +00:00