coreboot/src/soc
Mario Scheithauer 403458e7ec siemens/mc_apl1: Extend circuit life by clock gating and power gating
The firmware of devices connected to LPC should deassert the LPC CLKRUN#
signal when there is no bus activity on LPC.

Necessary changes:

- Enable LPC CLKRUN#
- Enable LPC PCE (Power Control Enable)
- Enable LPC CCE (Clock Control Enable)
- Remove I/O decoding range on LPC for COM 3
- Disable I/O UART driver

Change-Id: I2fd80e3fdcf23658f97b8182a77df7e09ddf25d6
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/28268
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-08-28 14:18:40 +00:00
..
amd update all FADT version 3.0 to use the get tables function 2018-08-27 15:49:32 +00:00
broadcom soc/broadcom/cygnus: Increase romstage SRAM size in memlayout 2018-08-13 12:16:32 +00:00
cavium soc/cn81xx: Add vboot support 2018-08-24 12:29:28 +00:00
imgtec soc/imgtec/pistachio: Get rid of device_t 2018-06-04 09:18:19 +00:00
intel siemens/mc_apl1: Extend circuit life by clock gating and power gating 2018-08-28 14:18:40 +00:00
lowrisc riscv: add support for modifying compiler options 2018-07-17 18:09:43 +00:00
mediatek arm64: Factor out common parts of romstage execution flow 2018-08-17 21:29:46 +00:00
nvidia arm64: Remove set_cntfrq() function 2018-08-10 04:16:06 +00:00
qualcomm drivers/i2c: Add i2c TPM support for different stages 2018-08-10 23:25:52 +00:00
rockchip drivers/i2c: Add i2c TPM support for different stages 2018-08-10 23:25:52 +00:00
samsung src: Fix typo 2018-08-10 21:25:53 +00:00
sifive sifive/fu540: add empty sdram init and size functions 2018-07-18 07:54:54 +00:00
ucb riscv: add support for modifying compiler options 2018-07-17 18:09:43 +00:00