coreboot/src
Mario Scheithauer 403458e7ec siemens/mc_apl1: Extend circuit life by clock gating and power gating
The firmware of devices connected to LPC should deassert the LPC CLKRUN#
signal when there is no bus activity on LPC.

Necessary changes:

- Enable LPC CLKRUN#
- Enable LPC PCE (Power Control Enable)
- Enable LPC CCE (Clock Control Enable)
- Remove I/O decoding range on LPC for COM 3
- Disable I/O UART driver

Change-Id: I2fd80e3fdcf23658f97b8182a77df7e09ddf25d6
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/28268
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-08-28 14:18:40 +00:00
..
acpi
arch
commonlib
console
cpu
device
drivers google/grunt: Reset BayHub EMMC freq to SD base CLK 50MHz 2018-08-28 14:15:57 +00:00
ec
include
lib lib/nhlt: Use common function to set NHLT version 2018-08-27 15:54:34 +00:00
mainboard siemens/mc_apl1: Extend circuit life by clock gating and power gating 2018-08-28 14:18:40 +00:00
northbridge
security
soc siemens/mc_apl1: Extend circuit life by clock gating and power gating 2018-08-28 14:18:40 +00:00
southbridge
superio
vendorcode vendorcode/amd/pi/00670F00: Remove IDS headers 2018-08-28 14:17:41 +00:00
Kconfig