coreboot/src/soc
Ritul Guru 75a073d5ff soc/amd/phoenix: update mmconf base address and size
0xF8000000 was taken from old platform during phoenix porting, updating
it to 0xE0000000 to make room for 256 pci busses which is required for
usb4 and hotplug support. mmconf size gets set to 0x10000000 when 256
busses are used.

Change-Id: Ic143171f5650aff5db48c8f477d7aca3e7f5c1e7
Signed-off-by: Ritul Guru <ritul.bits@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71870
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-01-13 23:42:04 +00:00
..
amd soc/amd/phoenix: update mmconf base address and size 2023-01-13 23:42:04 +00:00
cavium treewide: stop calling custom TPM log "TCPA" 2023-01-11 16:00:55 +00:00
example/min86 soc: Add SPDX license headers to Makefiles 2022-10-31 03:27:13 +00:00
intel soc/intel : Use 'enum cb_err' values 2023-01-13 04:51:15 +00:00
mediatek soc/mediatek: Include <gpio.h> instead of <soc/gpio.h> 2023-01-13 16:51:36 +00:00
nvidia treewide: stop calling custom TPM log "TCPA" 2023-01-11 16:00:55 +00:00
qualcomm treewide: stop calling custom TPM log "TCPA" 2023-01-11 16:00:55 +00:00
rockchip cbmem_top_chipset: Change the return value to uintptr_t 2022-11-18 16:00:45 +00:00
samsung treewide: stop calling custom TPM log "TCPA" 2023-01-11 16:00:55 +00:00
sifive/fu540 cbmem_top_chipset: Change the return value to uintptr_t 2022-11-18 16:00:45 +00:00
ti src/soc/ti: Remove unnecessary space after casts 2022-11-22 13:42:28 +00:00
ucb/riscv cbmem_top_chipset: Change the return value to uintptr_t 2022-11-18 16:00:45 +00:00