On PPC64 each address is logically OR'ed with HRMOR (Hypervisor Real Mode Offset Register) before it is dispatched to the underlying memory, meaning that memory space overlaps at the least significant bit set in HRMOR. coreboot is entered with HRMOR = 4GB-128MB both on hardware (when started by hostboot bootloader) and in Qemu in hb-mode. This means that memory overlaps every 128MB in this particular case. HRMOR can be explicitly ignored when MSB of an address is set, but this would require using different memory model for linking. If we zero HRMOR in bootblock, linking can be done against real address. This greatly simplifies memory layout and allows to forget about HRMOR from that point on. Signed-off-by: Krystian Hebel <krystian.hebel@3mdeb.com> Signed-off-by: Maciej Pijanowski <maciej.pijanowski@3mdeb.com> Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Change-Id: I0170463968c91b943c4b0dc15fe73fa616a164da Reviewed-on: https://review.coreboot.org/c/coreboot/+/67067 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
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| qemu-aarch64 | ||
| qemu-armv7 | ||
| qemu-i440fx | ||
| qemu-power8 | ||
| qemu-power9 | ||
| qemu-q35 | ||
| qemu-riscv | ||
| qemu-sbsa | ||
| spike-riscv | ||
| Kconfig | ||
| Kconfig.name | ||