fc195ed1f0
On Chrome OS systems a memory setting change is needed to be deployed
without updating the FSP blob proper. Under such conditions one needs
to trigger retrain of the memory. For ease of use provide an option,
FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS, which incorproates the SoC
and mainboard memory setting version number into the FSP version
passed to the platform. The lower 8 bits of the FSP version are the
build number which in practice is normally 0. Use those 8 bits to
include the SoC and mainboard memory settings version. When FSP,
SoC, or mainboard memory setting number is bumped a retrain will be
triggered.
BUG=b:37687843
Change-Id: Ia0298efc1cb40716f808fcd2779a0d56ebec800a
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Original-Commit-Id:
|
||
|---|---|---|
| .. | ||
| ams | ||
| aspeed | ||
| ati/ragexl | ||
| dec/21143 | ||
| elog | ||
| emulation/qemu | ||
| generic | ||
| gic | ||
| i2c | ||
| ics/954309 | ||
| intel | ||
| ipmi | ||
| lenovo | ||
| maxim | ||
| net | ||
| parade | ||
| pc80 | ||
| ricoh/rce822 | ||
| siemens/nc_fpga | ||
| sil/3114 | ||
| spi | ||
| storage | ||
| ti | ||
| uart | ||
| usb | ||
| xgi | ||
| xpowers/axp209 | ||